Weekend VLSI HOME
Weekend VLSI
About Us: Struggling a lot to enter into the VLSI Industry? We too went through this phase, Trust us and do work hard. If we can get into Industry, YOU TOO CAN. To help you, we come up with this blog. It's in initial phase, We'll keep gathering information and place it in front of you in Simple terms. Also give use some feedbacks or the topics you are interested and want to know further, We'll post on that as well.
RTL CODING GUIDE LINES
DIGTIAL ELECTRONICS QUESTIONS
RTL DESIGN QUESTIONS
RTL CODING EXAMPLES
- Vending Machine With Display options
- Different ways to Design ROM
- 6 bit Full adder Using 3 bit Full adder
- 3 bit Subtractor
- Post Divider
- 4x4 Booth Multiplier
- 101101 Sequence Detector
- Falling Edge Detector
- Rising Edge Detector
- FIFO
- Number of one's Detection In Input
- Prime Number
- Fibonacci Number
- 8x8 Vedic Multiplier
- Rational Clock Division
- Different ways to Design 8x3 Priority Encoder
- ASIC and FPGA Flow Synopsis
- Stratified Event Queue in Verilog
ANNOUNCEMENTS
- RTL INTERVIEW QUESTIONS Updated....................................................
- RTL Code Examples also will Update soon.................................................................
VLSI Job Updates : Check here
*Please Suggest topics will update that also very soon......
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