3 Bit Subtractor Using 1 bit Subtractor
1bit Subtractor : module full_sub_bit(Diff,Bout,A,B,BI); output Diff,Bout; input A,B,BI; wire x,x1,y,z,y2; xor V1 (x,A,B),V2 (Diff,x,BI); not V3 (y,A),v4 (x1,x); and V5 (z,y,B),V6 (y2,x1,BI); or V7 (Bout,y2,z); endmodule 3bit Subtractor : module full_sub_3bit (Sub, BO, A, B, BI,); input [2:0] A, B; input BI; output [2:0] Sub; output BO; wire B1,B2; full_sub_bit v1 (Sub[0],B1,A[0],B[0],BI); (Module name Instantiation name Ports mapping); full_sub_bit v2 (Sub[1],B2,A[1],B[1],B1); full_sub_bit v3 (Sub[2],BO,A[2],B[2],B2); endmodule TESTBENCH module tb; reg [2:0] A,B; reg BI; wire [2:0] Sub; wire BO; full_sub_3bit dut (Sub, BO, A, B, BI,); initial begin A=3'b000; B=3'b10...