Rising Edge Detector

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 Rising Edge Detector:





`timescale 1ns / 1ps

//////////////////////////////////////////////////////////////////////////////////

// Company: Weekendvlsi.blogspot.com

// Engineer: Weekendvlsi

// Create Date: 

// Design Name: Rising Edge Detector

// Module Name: pos_detect

//////////////////////////////////////////////////////////////////////////////////


module pos_detect (output neg_det, input clk,rst,d);

  reg  q,y;

 always @(posedge clk  ) begin 

    if(rst)  

      q<=0;

    else begin 

       q<=d;

     end 

  end

  not v1 (y,q);

   and v2 (neg_det,y,d);

 endmodule 


RESULTS:

                       






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